Multi-Core By Default
rfleury.com·17h·
🧵Concurrency
GoMem is a high-performance memory allocator library for Go
github.com·16h
🧠Memory Allocators
Framework for Optimizing Reliability and Thermal Management of 3DICs (National Taiwan Univ., Lamar Univ.)
semiengineering.com·2h
🔬Chip Fabrication
Looking at my Arduino
boswell.bearblog.dev·2h
🖥️Hardware Architecture
Building a sync server in Rust?
reddit.com·15h·
Discuss: r/rust
🦀Rust
QUIC! Jump to User Space!
hackaday.com·3h
QUIC Protocol
A new method to build more energy-efficient memory devices could lead to a sustainable data future
phys.org·10h
🏭TSMC
Trusted Execution Environments? More Like "Trust Us, Bro" Environments
libroot.org·54m·
Discuss: Hacker News
🔐Hardware Security
N8n vs. Windmill vs. Temporal
blog.arcbjorn.com·19h·
Discuss: Hacker News
🚀Async Optimization
Exploring TSMC’s OIP Ecosystem Benefits
semiwiki.com·6h
🏭TSMC
Explicit Lossless Vertex Expanders!
gilkalai.wordpress.com·9h
🔬RaBitQ
Profiling Your Code: 5 Tips to Significantly Boost Performance
usenix.org·17h
Systems Performance
MultiPar 1.3.3.5 Beta / 1.3.2.9
majorgeeks.com·11h
📄File Formats
Iterated Development and Study of Schemers (IDSS)
lesswrong.com·4h
🆕New AI
Show HN: Real-time Docker event watcher with multi-channel notifications
github.com·11h·
Discuss: Hacker News
📦Container Runtimes
SLip - An aspiring Common Lisp environment in the browser.
lisperator.net·6h·
Discuss: r/programming
🌿Leptos
Present Latency, DWM and Waitable Swapchains (2018)
jackmin.home.blog·21h·
Discuss: Hacker News
⚙️Mechanical Sympathy
🎲 Intel Pentium II introduced May 7, 1997
dfarq.homeip.net·12h
🖥️Hardware Architecture
Intel Bets Recovery on Panther Lake AI Chip as Foundry Bleeds Billions - Decrypt
news.google.com·18h
💻Chips